Undergraduate Teaching

Engineering Tripos Part IIB, 4B7: VLSI Design, Technology & CAD, 2016-17

Engineering Tripos Part IIB, 4B7: VLSI Design, Technology & CAD, 2016-17

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Module Leader

Dr D Holburn

Lecturers

Dr D Holburn and Prof A Nathan

Timing and Structure

Lent term. 12 lectures (including examples classes) + coursework. Assessment: 75% exam/25% coursework

Prerequisites

3B1, 3B2, 3B5 assumed; 3B3, 3B6 useful

Aims

The aims of the course are to:

  • describe the design, technology and manufacture of MOS integrated circuits and future nanoscale electron devices.

Objectives

As specific objectives, by the end of the course students should be able to:

  • have developed an awareness of the requirements for IC technology.
  • understand how device miniaturisation has led to improved device performance and the potential limits to this process.
  • understand the design process for CMOS ICs.
  • appreciate the vital role of CAD in microelectronic design.
  • recognise the potential of VLSI technology in information engineering.
  • understand how performance and cost are related to design and process technology.

Syllabus

The aim of this module is to describe the design, technology and manufacture of MOS integrated circuits and future nanoscale electron devices. It will provide a firm foundation for those wishing to pursue careers in applications or in research/development in the field of semiconductor devices/circuits.

VLSI Design and CAD of MOS Integrated Circuits (8L, Dr D M Holburn)

  • Challenges of designing complex CMOS circuits.
  • Hierarchical design, layout and design rules.
  • Parasitic elements, simulation and verification.
  • VLSI circuit techniques.
  • Case study: a typical i.c. design.

Integrated Devices and VLSI Technology (4L, Prof. A Nathan)

  • Challenges of VLSI technology.
  • Example of CMOS: fabrication
  • Case study of i.c. technology.
  • Recent developments and future prognosis.

Further notes

ASSESSMENT

Lecture Syllabus/Written exam (1.5 hours) - Start of Easter Term/75%
Coursework/Report - End of Lent Term/25%

Coursework

Either (a) 2 hour laboratory practical to assess the performance of CMOS devices and ring oscillators, with a 4 side report;
or (b) 2 hour hands-on scanning electron microscope examination of devices and circuits, with 4-side report;

Booklists

Please see the Booklist for Group B Courses for references for this module.

Assessment

Please refer to Form & conduct of the examinations.

UK-SPEC

The UK Standard for Professional Engineering Competence (UK-SPEC) describes the requirements that have to be met in order to become a Chartered Engineer, and gives examples of ways of doing this.

UK-SPEC is published by the Engineering Council on behalf of the UK engineering profession. The standard has been developed, and is regularly updated, by panels representing professional engineering institutions, employers and engineering educators. Of particular relevance here is the 'Accreditation of Higher Education Programmes' (AHEP) document which sets out the standard for degree accreditation.

The Output Standards Matrices indicate where each of the Output Criteria as specified in the AHEP 3rd edition document is addressed within the Engineering and Manufacturing Engineering Triposes.

Last modified: 31/05/2016 09:11