Undergraduate Teaching 2025-26

Not logged in. More information may be available... Login via Raven / direct.

Engineering Tripos Part IIA Project, SF4: Data Logger, 2023-24

Leader

Prof I Lestas

Timing and Structure

Fridays 11-1pm and Tuesdays 9-11am plus afternoons

Prerequisites

3B1 / 3B2 advised

Aims

The aims of the course are to:

  • To introduce electronic system design concepts.
  • To gain familiarity with computer-aided design methodology required for electronic system realisation.
  • To gain experience in testing and performance evaluation of electronic systems.

Content

This project is based on designing an electronic system which can capture data and store/process it on a PC. It is intended to serve as a practical introduction to a number of aspects of embedded electronic system design and to result in the development of a prototype electronic product.

The project will utilise a microcontroller development board (Arduino) and custom hardware to produce a prototype device. There is a free choice of application, but all projects involve the design and implementation of analogue data capture electronics, firmware for the microcontroller, a communications protocol, and a Windows application.

A reference design will be provided to the students in the first instance. By the first week, students will have constructed and tested a simple device which can demonstrate PC-control (via blinking an LED). The ultimate goal is to build a PC-based application, for example a digital/analogue oscilloscope. The second week will be spent on deciding on the system specifications (eg. the voltage range, frequency range etc in the case of an oscilloscope), functions (eg. gain control, offset control, triggering, etc) and data processing (eg. on-screen measurement, fast fourier transform). The students will then need to produce a design for their specification and a bill-of-materials (on a fixed budget). This must be submitted during the second week. The last two weeks will be based on the implementation and testing to specification of the prototype. The end result of the project is a portable data logger-based device which students can take home and use on their own PC.

This project will involve analogue and digital electronic hardware design. There will also be a significant amount of software development with respect to microcontroller firmware mainly in C/C++. Some prior experience of one or more of these areas would be useful.

FORMAT

Students will work in groups of two, with each group designing and testing their own data logger.

ACTIVITIES

Week 1:ᅠBuild and test your reference design data logger

Week 2:ᅠSpecification issue, design (circuit, comms protocol, Windows application interface) and bill of materials (interim report).

Week 3:ᅠCircuit construction and test.

Week 4:ᅠFinal testing and demonstration of data logger (final report).

Coursework

Coursework Due date Marks

First report

end of week 2

10

Demonstration

end of week 4

30

Final report

4pm end of week 4

40

 

Examination Guidelines

Please refer to Form & conduct of the examinations.

 
Last modified: 27/11/2023 09:51

Engineering Tripos Part IIA Project, SF4: Data Logger, 2022-23

Leader

Prof I Lestas

Timing and Structure

Fridays 11-1pm and Tuesdays 9-11am plus afternoons

Prerequisites

3B1 / 3B2 advised

Aims

The aims of the course are to:

  • To introduce electronic system design concepts.
  • To gain familiarity with computer-aided design methodology required for electronic system realisation.
  • To gain experience in testing and performance evaluation of electronic systems.

Content

This project is based on designing an electronic system which can capture data and store/process it on a PC. It is intended to serve as a practical introduction to a number of aspects of embedded electronic system design and to result in the development of a prototype electronic product.

The project will utilise a microcontroller development board (Arduino) and custom hardware to produce a prototype device. There is a free choice of application, but all projects involve the design and implementation of analogue data capture electronics, firmware for the microcontroller, a communications protocol, and a Windows application.

A reference design will be provided to the students in the first instance. By the first week, students will have constructed and tested a simple device which can demonstrate PC-control (via blinking an LED). The ultimate goal is to build a PC-based application, for example a digital/analogue oscilloscope. The second week will be spent on deciding on the system specifications (eg. the voltage range, frequency range etc in the case of an oscilloscope), functions (eg. gain control, offset control, triggering, etc) and data processing (eg. on-screen measurement, fast fourier transform). The students will then need to produce a design for their specification and a bill-of-materials (on a fixed budget). This must be submitted during the second week. The last two weeks will be based on the implementation and testing to specification of the prototype. The end result of the project is a portable data logger-based device which students can take home and use on their own PC.

This project will involve analogue and digital electronic hardware design. There will also be a significant amount of software development with respect to microcontroller firmware mainly in C/C++. Some prior experience of one or more of these areas would be useful.

FORMAT

Students will work in groups of two, with each group designing and testing their own data logger.

ACTIVITIES

Week 1:ᅠBuild and test your reference design data logger

Week 2:ᅠSpecification issue, design (circuit, comms protocol, Windows application interface) and bill of materials (interim report).

Week 3:ᅠCircuit construction and test.

Week 4:ᅠFinal testing and demonstration of data logger (final report).

Coursework

Coursework Due date Marks

First report

end of week 2

10

Demonstration

end of week 4

30

Final report

4pm end of week 4

40

 

Examination Guidelines

Please refer to Form & conduct of the examinations.

 
Last modified: 28/11/2022 10:35

Engineering Tripos Part IIA Project, SF4: Data Logger, 2020-21

Leader

Dr I C Lestas

Timing and Structure

Fridays 11-1pm and Tuesdays 9-11am plus afternoons

Prerequisites

3B1 / 3B2 advised

Aims

The aims of the course are to:

  • To introduce electronic system design concepts.
  • To gain familiarity with computer-aided design methodology required for electronic system realisation.
  • To gain experience in testing and performance evaluation of electronic systems.

Content

This project is based on designing an electronic system which can capture data and store/process it on a PC. It is intended to serve as a practical introduction to a number of aspects of embedded electronic system design and to result in the development of a prototype electronic product.

The project will utilise a microcontroller development board and custom hardware to produce a prototype device. There is a free choice of application, but all projects involve the design and implementation of analogue data capture electronics, firmware for the microcontroller, a communications protocol, and a Windows application.

A reference design will be provided to the students in the first instance. By the first week, students will have constructed and tested a simple device which can demonstrate PC-control (via blinking an LED). The ultimate goal is to build a PC-based application, for example a digital/analogue oscilloscope. The second week will be spent on deciding on the system specifications (eg. the voltage range, frequency range etc in the case of an oscilloscope), functions (eg. gain control, offset control, triggering, etc) and data processing (eg. on-screen measurement, fast fourier transform). The students will then need to produce a design for their specification and a bill-of-materials (on a fixed budget). This must be submitted during the second week. The last two weeks will be based on the implementation and testing to specification of the prototype. The end result of the project is a portable data logger-based device which students can take home and use on their own PC.

This project will involve analogue and digital electronic hardware design. There will also be a significant amount of software development with respect to microcontroller firmware mainly in C/C++. Some prior experience of one or more of these areas would be useful.

FORMAT

Students will work in groups of two, with each group designing and testing their own data logger.

ACTIVITIES

Week 1:ᅠBuild and test your reference design data logger

Week 2:ᅠSpecification issue, design (circuit, comms protocol, Windows application interface) and bill of materials (interim report).

Week 3:ᅠCircuit construction and test.

Week 4:ᅠFinal testing and demonstration of data logger (final report).

Coursework

Coursework Due date Marks

First report

end of week 2

10

Demonstration

end of week 4

30

Final report

4pm end of week 4

40

 

Examination Guidelines

Please refer to Form & conduct of the examinations.

 
Last modified: 30/11/2020 09:05

Engineering Tripos Part IIA Project, SB3: Data Logger, 2018-19

Leader

Dr I C Lestas

Timing and Structure

Thursdays 11-1pm and Mondays 9-11am plus afternoons

Prerequisites

3B1 / 3B2 advised

Aims

The aims of the course are to:

  • To introduce electronic system design concepts.
  • To gain familiarity with computer-aided design methodology required for electronic system realisation.
  • To gain experience in testing and performance evaluation of electronic systems.

Content

This project is based on designing an electronic system which can capture data and store/process it on a PC. It is intended to serve as a practical introduction to a number of aspects of embedded electronic system design and to result in the development of a prototype electronic product.

The project will utilise a microcontroller development board and custom hardware to produce a prototype device. There is a free choice of application, but all projects involve the design and implementation of analogue data capture electronics, firmware for the microcontroller, a communications protocol, and a Windows application.

A reference design will be provided to the students in the first instance. By the first week, students will have constructed and tested a simple device which can demonstrate PC-control (via blinking a LED) and read a voltage and display it on their PC. All source code is provided for this reference design. The ultimate goal is to build PC-based application, for example a digital/analogue oscilloscope. The second week will be spent on deciding on the system specifications (eg. the voltage range, frequency range etc in the case of an oscilloscope), functions (eg. gain control, offset control, triggering, etc) and data processing (eg. on-screen measurement, fast fourier transform). The students will then need to produce a design for their specification and a bill-of-materials (on a fixed budget). This must be submitted during the second week. The last two weeks will be based on the implementation and testing to specification of the prototype. The end result of the project is a portable data logger-based device which students can take home and use on their own PC.

This project will involve analogue and digital electronic hardware design. There will also be a significant amount of software development with respect to microcontroller firmware and Windows application software, mainly in C/C++. Some prior experience of one or more of these areas would be useful.

FORMAT

Students will work in groups of two, with each group designing and testing their own data logger.

ACTIVITIES

Week 1:ᅠBuild and test your reference design data logger

Week 2:ᅠSpecification issue, design (circuit, comms protocol, Windows application interface) and bill of materials (interim report).

Week 3:ᅠCircuit construction and test.

Week 4:ᅠFinal testing and demonstration of data logger (final report).

Coursework

Coursework Due date Marks

First report

end of week 2

10

Demonstration

end of week 4

30

Final report

4pm end of week 4

40

 

Examination Guidelines

Please refer to Form & conduct of the examinations.

 
Last modified: 03/10/2018 10:17

Engineering Tripos Part IIA Project, SB3: Data Logger, 2017-18

Leader

Dr I C Lestas

Timing and Structure

Thursdays 11-1pm and Mondays 9-11am plus afternoons

Prerequisites

3B1 / 3B2 advised

Aims

The aims of the course are to:

  • To introduce electronic system design concepts.
  • To gain familiarity with computer-aided design methodology required for electronic system realisation.
  • To gain experience in testing and performance evaluation of electronic systems.

Content

This project is based on designing an electronic system which can capture data and store/process it on a PC. It is intended to serve as a practical introduction to a number of aspects of embedded electronic system design and to result in the development of a prototype electronic product.

The project will utilise a microcontroller development board and custom hardware to produce a prototype device. There is a free choice of application, but all projects involve the design and implementation of analogue data capture electronics, firmware for the microcontroller, a communications protocol, and a Windows application.

A reference design will be provided to the students in the first instance. By the first week, students will have constructed and tested a simple device which can demonstrate PC-control (via blinking a LED) and read a voltage and display it on their PC. All source code is provided for this reference design. The ultimate goal is to build PC-based application, for example a digital/analogue oscilloscope. The second week will be spent on deciding on the system specifications (eg. the voltage range, frequency range etc in the case of an oscilloscope), functions (eg. gain control, offset control, triggering, etc) and data processing (eg. on-screen measurement, fast fourier transform). The students will then need to produce a design for their specification and a bill-of-materials (on a fixed budget). This must be submitted during the second week. The last two weeks will be based on the implementation and testing to specification of the prototype. The end result of the project is a portable data logger-based device which students can take home and use on their own PC.

This project will involve analogue and digital electronic hardware design. There will also be a significant amount of software development with respect to microcontroller firmware and Windows application software, mainly in C/C++. Some prior experience of one or more of these areas would be useful.

FORMAT

Students will work in groups of two, with each group designing and testing their own data logger.

ACTIVITIES

Week 1:ᅠBuild and test your reference design data logger

Week 2:ᅠSpecification issue, design (circuit, comms protocol, Windows application interface) and bill of materials (interim report).

Week 3:ᅠCircuit construction and test.

Week 4:ᅠFinal testing and demonstration of data logger (final report).

Coursework

Coursework Due date Marks

First report

end of week 2

10

Demonstration

end of week 4

30

Final report

4pm end of week 4

40

 

Examination Guidelines

Please refer to Form & conduct of the examinations.

 
Last modified: 24/10/2017 15:58

Engineering Tripos Part IIA Project, SB1: VLSI Design, 2018-19

Leader

Dr D M Holburn

Timing and Structure

Fridays 9-11am, plus afternoons and Tuesdays 11-1pm

Prerequisites

3B1 & 3B2 very useful, Part IB Electrical Engineering Selected Topic helpful

Content

This project offers the unique experience of the full spectrum of activities undertaken by a professional IC designer. This is achieved through the design of a small ムsystem-on-a-chipメ, right to the point where it could be sent to a foundry for manufacture.

The project will begin with an introduction to the structure of MOS integrated circuits and the related design concepts. The importance of physical dimensions and design rules as fundamental elements in the design process will be illustrated using directed exercises.

The Mentor Graphics ICstudio design suite will be introduced through exercises in schematic capture and circuit simulation. The importance of hierarchy in IC design will be illustrated by developing a hierarchical design using cells drawn from a library of digital and analogue elements. Methods of high-level functional design synthesis based on hardware description languages (VHDL) will also be explored(Modelsim).

IC layout will be introduced through the examination of the layout of a simple two-input logic gate. This will be adapted and its layout modified to produce an efficient and high speed design(ICstation). This activity will also introduce the key mask layers and the tools available (ICrules) for detecting design rule violations. Techniques for interconnecting complex structures using metal and polysilicon layers will be explored. Methods for functional verification of the circuit will then be investigated, using dedicated tools for extracting netlists and parametric values from layout. These will be compared against a standardised set drawn from a circuit schematic (ICtrace). Tools for numerical modelling (Eldo) will be used to assess the transfer characteristic and transient response of the test design. The effects of varying device geometry on performance will be illustrated in this way. Simulated performance will be compared with measurements made on a design fabricated in an earlier project.

These approaches to design will then be combined in the implementation and verification of a more complex system, incorporating counters, dividers, control logic and, where appropriate, analogue circuit elements, augmented by a number of additional library cells, including the two-input gate laid out during the project. The development will continue to the point where a complete design is produced, ready for shipping to a silicon foundry for fabrication.

FORMAT

Students will work in pairs, sharing the development of the design, but writing individual reports. Parts of the development will be carried out individually and merged in the final design.

Week 1

Development of design. Familiarisation with schematic design capture, hardware description and functional simulation tools. First interim report.

Week 2

Layout and design rule verification of logic gate structure. Measurement of characteristics of a real ring oscillator. Second interim report.

Week 3

Netlist extraction and modelling of logic gate design. Refinement of design.

Weeks 4

Implementation of system-on-a-chip embodying contributions from each participantdesign, with verification carried out according to the techniques encountered in earlier sessions. Final report.

MINI-LECTURES

1.Introduction to VLSI Design. The ring oscillator.

2.Integrated Circuit Layout techniques

Circuit to be designed

After successfully completing the introductory exercises, students will first undertake a design including a ring oscillator, using a chain of inverting logic gates. A compact layout free from design rule violations, with the highest possible oscillation frequency will be the objectives. This will be used as a component in a more elaborate digital design, or ムsystem-on-a-chipメ, which will embody contributions from each participant. The target design will be described in the project manual.

Methods to be employed

Where necessary, student performance will be judged on the basis of: the extent to which the design meets the project specification, the compactness and freedom from violations of the layout, and the quality of the simulation results and other material presented in the interim and final reports.

Coursework

Coursework Format Due date Marks

Interim report 1

  Thu 16 May 2019

15

Interim report 2

 

Thu 23 May 2019

15

Final report

  4pm, Friday 7 June 2019

25

 

Examination Guidelines

Please refer to Form & conduct of the examinations.

 
Last modified: 21/07/2020 08:52

Engineering Tripos Part IIA Project, SB1: VLSI Design, 2017-18

Leader

Dr D M Holburn

Timing and Structure

Fridays 9-11am, plus afternoons and Tuesdays 11-1pm

Prerequisites

3B1 & 3B2 very useful, Part IB Electrical Engineering Selected Topic helpful

Content

This project offers the unique experience of the full spectrum of activities undertaken by a professional IC designer. This is achieved through the design of a small ムsystem-on-a-chipメ, right to the point where it could be sent to a foundry for manufacture.

The project will begin with an introduction to the structure of MOS integrated circuits and the related design concepts. The importance of physical dimensions and design rules as fundamental elements in the design process will be illustrated using directed exercises.

The Mentor Graphics ICstudio design suite will be introduced through exercises in schematic capture and circuit simulation. The importance of hierarchy in IC design will be illustrated by developing a hierarchical design using cells drawn from a library of digital and analogue elements. Methods of high-level functional design synthesis based on hardware description languages (VHDL) will also be explored(Modelsim).

IC layout will be introduced through the examination of the layout of a simple two-input logic gate. This will be adapted and its layout modified to produce an efficient and high speed design(ICstation). This activity will also introduce the key mask layers and the tools available (ICrules) for detecting design rule violations. Techniques for interconnecting complex structures using metal and polysilicon layers will be explored. Methods for functional verification of the circuit will then be investigated, using dedicated tools for extracting netlists and parametric values from layout. These will be compared against a standardised set drawn from a circuit schematic (ICtrace). Tools for numerical modelling (Eldo) will be used to assess the transfer characteristic and transient response of the test design. The effects of varying device geometry on performance will be illustrated in this way. Simulated performance will be compared with measurements made on a design fabricated in an earlier project.

These approaches to design will then be combined in the implementation and verification of a more complex system, incorporating counters, dividers, control logic and, where appropriate, analogue circuit elements, augmented by a number of additional library cells, including the two-input gate laid out during the project. The development will continue to the point where a complete design is produced, ready for shipping to a silicon foundry for fabrication.

FORMAT

Students will work in pairs, sharing the development of the design, but writing individual reports. Parts of the development will be carried out individually and merged in the final design.

Week 1

Development of design. Familiarisation with schematic design capture, hardware description and functional simulation tools. First interim report.

Week 2

Layout and design rule verification of logic gate structure. Measurement of characteristics of a real ring oscillator. Second interim report.

Week 3

Netlist extraction and modelling of logic gate design. Refinement of design.

Weeks 4

Implementation of system-on-a-chip embodying contributions from each participantdesign, with verification carried out according to the techniques encountered in earlier sessions. Final report.

MINI-LECTURES

1.Introduction to VLSI Design. The ring oscillator.

2.Integrated Circuit Layout techniques

Circuit to be designed

After successfully completing the introductory exercises, students will first undertake a design including a ring oscillator, using a chain of inverting logic gates. A compact layout free from design rule violations, with the highest possible oscillation frequency will be the objectives. This will be used as a component in a more elaborate digital design, or ムsystem-on-a-chipメ, which will embody contributions from each participant. The target design will be described in the project manual.

Methods to be employed

Where necessary, student performance will be judged on the basis of: the extent to which the design meets the project specification, the compactness and freedom from violations of the layout, and the quality of the simulation results and other material presented in the interim and final reports.

Coursework

Coursework Format Due date Marks

Interim report 1

  Thu 17 May 2018

15

Interim report 2

 

Thu 24 May 2018

15

Final report

  4pm, Friday 8 June 2018

25

 

Examination Guidelines

Please refer to Form & conduct of the examinations.

 
Last modified: 21/07/2020 08:52

Engineering Tripos Part IIA Project, SA1: Aircraft Wing Analysis, 2025-26

Leader

Prof R Garcia-Mayoral

Timing and Structure

Thursdays 11-1pm, and Mondays 9-11am plus afternoons

Prerequisites

3A1 is essential

Aims

The aims of the course are to:

  • write a Matlab code that calculates the lift and drag on a 2D aerofoil section;
  • design high-efficiency aerofoil sections, using numerical calculations to guide the process;
  • gain an understanding of the aerodynamics of aerofoils, in particular the role of the boundary layer in limiting performance;
  • obtain an appreciation of the strengths and weaknesses of CFD itself.

Content

The advent of high-performance computing has radically changed the aerospace industry's approach to wing design. In the past, wing sections were based closely on one of the wide range of standard geometries for which experimental data were already available, and optimisation was via extensive wind tunnel testing. Now, most initial section design is based on numerical calculations, with experimental work appearing later in the process. The advantage of this combined approach is that the experimental data which is the backbone of any development project is still obtained, but expensive wind tunnel tests can be targeted on the most promising designs identified by the (relatively) cheap computations. This computer-based project provides an introduction to the numerical design process, in the context of two-dimensional aerofoil sections for aeroplane wings. Programming experience above and beyond Part I computing coursework activities is not necessary.

Week 1

Write a 2D potential flow panel method. Validate via comparison with analytical solutions for standard test cases. First interim report.

Week 2

Write an integral boundary layer equation solver. Validate via comparison with theoretical and empirical results for laminar and turbulent boundary layers. Second interim report.

Weeks 3 & 4

Combine the potential flow and boundary layer routines to produce an aerofoil analysis code. Design your own 2D aerofoil sections using calculation results to guide the process. Final report.

Coursework

Coursework Due date Marks

Interim report 1

TBA

15

Interim report 2

 TBA

15

Final report

4pm TBA

50

 

Examination Guidelines

Please refer to Form & conduct of the examinations.

 
Last modified: 01/12/2025 07:18

Engineering Tripos Part IIA Project, SA1: Aircraft Wing Analysis, 2024-25

Leader

Dr Will Graham

Timing and Structure

Thursdays 11-1pm, and Mondays 9-11am plus afternoons

Prerequisites

3A1 is essential

Aims

The aims of the course are to:

  • write a Matlab code that calculates the lift and drag on a 2D aerofoil section;
  • design high-efficiency aerofoil sections, using numerical calculations to guide the process;
  • gain an understanding of the aerodynamics of aerofoils, in particular the role of the boundary layer in limiting performance;
  • obtain an appreciation of the strengths and weaknesses of CFD itself.

Content

The advent of high-performance computing has radically changed the aerospace industry's approach to wing design. In the past, wing sections were based closely on one of the wide range of standard geometries for which experimental data were already available, and optimisation was via extensive wind tunnel testing. Now, most initial section design is based on numerical calculations, with experimental work appearing later in the process. The advantage of this combined approach is that the experimental data which is the backbone of any development project is still obtained, but expensive wind tunnel tests can be targeted on the most promising designs identified by the (relatively) cheap computations. This computer-based project provides an introduction to the numerical design process, in the context of two-dimensional aerofoil sections for aeroplane wings. Programming experience above and beyond Part I computing coursework activities is not necessary.

Week 1

Write a 2D potential flow panel method. Validate via comparison with analytical solutions for standard test cases. First interim report.

Week 2

Write an integral boundary layer equation solver. Validate via comparison with theoretical and empirical results for laminar and turbulent boundary layers. Second interim report.

Weeks 3 & 4

Combine the potential flow and boundary layer routines to produce an aerofoil analysis code. Design your own 2D aerofoil sections using calculation results to guide the process. Final report.

Coursework

Coursework Due date Marks

Interim report 1

TBA

15

Interim report 2

 TBA

15

Final report

4pm TBA

50

 

Examination Guidelines

Please refer to Form & conduct of the examinations.

 
Last modified: 29/11/2024 15:19

Engineering Tripos Part IIA Project, SA1: Aircraft Wing Analysis, 2023-24

Leader

Prof R Garcia-Mayoral

Timing and Structure

Thursdays 11-1pm, and Mondays 9-11am plus afternoons

Prerequisites

3A1 is essential

Aims

The aims of the course are to:

  • write a Matlab code that calculates the lift and drag on a 2D aerofoil section;
  • design high-efficiency aerofoil sections, using numerical calculations to guide the process;
  • gain an understanding of the aerodynamics of aerofoils, in particular the role of the boundary layer in limiting performance;
  • obtain an appreciation of the strengths and weaknesses of CFD itself.

Content

The advent of high-performance computing has radically changed the aerospace industry's approach to wing design. In the past, wing sections were based closely on one of the wide range of standard geometries for which experimental data were already available, and optimisation was via extensive wind tunnel testing. Now, most initial section design is based on numerical calculations, with experimental work appearing later in the process. The advantage of this combined approach is that the experimental data which is the backbone of any development project is still obtained, but expensive wind tunnel tests can be targeted on the most promising designs identified by the (relatively) cheap computations. This computer-based project provides an introduction to the numerical design process, in the context of two-dimensional aerofoil sections for aeroplane wings. Programming experience above and beyond Part I computing coursework activities is not necessary.

Week 1

Write a 2D potential flow panel method. Validate via comparison with analytical solutions for standard test cases. First interim report.

Week 2

Write an integral boundary layer equation solver. Validate via comparison with theoretical and empirical results for laminar and turbulent boundary layers. Second interim report.

Weeks 3 & 4

Combine the potential flow and boundary layer routines to produce an aerofoil analysis code. Design your own 2D aerofoil sections using calculation results to guide the process. Final report.

Coursework

Coursework Due date Marks

Interim report 1

TBA

15

Interim report 2

 TBA

15

Final report

4pm TBA

50

 

Examination Guidelines

Please refer to Form & conduct of the examinations.

 
Last modified: 27/11/2023 09:50

Pages

Subscribe to CUED undergraduate teaching site RSS