Undergraduate Teaching 2018-19

Engineering Tripos Part IA, 1P3: Digital Circuits and Information Processing, 2017-18

Engineering Tripos Part IA, 1P3: Digital Circuits and Information Processing, 2017-18

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Prof R Penty

Timing and Structure

Weeks 7-8, Lent term and weeks 1-4, Easter, 16 lectures, 2 lectures per week in Lent Term,3 lectures in Easter Term


The aims of the course are to:

  • Familiarise students with combinational and sequential digital logic circuits, and the analogue-digital interface,
  • Familiarise students with the hardware and basic operation of microprocessors, memory and the associated electronic circuits which are required to build microprocessor-based systems.
  • Teach the engineering relevance and application of digital and microprocessor-based systems, give students the ability to design simple systems of this kind, and understand microprocessor operation at the assembly-code level.


As specific objectives, by the end of the course students should be able to:

  • Know the nomenclature and the representation of basic gates and digital electronic components (including shift registers, counters, latches, RAM and ROM ICs)
  • Understand Boolean algebra, and be able to convert verbal descriptions of requirements into Boolean notation
  • Understand the need to simplify logic functions or rearrange them to use specific gate types; be able to use Boolean algebra and Karnaugh maps (for up to 4 variables) to achieve these tasks; be able to use "don't care states" in K-maps.
  • Know about logic "families", the electronic circuit implementation of logic gates, and the resulting engineering issues (voltage thresholds, noise margin, finite rise time and delay)
  • Know about Schmitt inputs; understand static hazards and be able to detect them using K-maps and correct them
  • Be familiar with standard number codes for representing data (two's complement notation, sign+magnitude, one's complement, Gray code, ASCII); be able to convert between binary, hex, octal and decimal.
  • Understand the operation of logic circuits for addition, negation and subtraction of binary integers
  • Be familiar with examples of elementary VHDL and understand why it is useful
  • Understand the distinction between combinational and sequential logic and the role of sequential logic; be familiar with unclocked and clocked S-R latches, D-type and JK flip-flops.
  • Understand the operation and use of synchronous and asynchronous counters and shift registers.
  • Understand state diagrams and their role in sequential circuit design; be able to convert a problem statement into a state diagram; be able to convert a state diagram into a circuit design based on JK flip-flops
  • Understand unused states, and be able to guard against errors due to them. Be able to carry out the complete design process, from problem statement to circuit design.
  • Understand the operation of weighted resistor and R-2R ladder DAC circuits
  • Understand the operation of Full Adder and Ripple Carry Circuits
  • Understand ROM and RAM memory circuits, the function of their control, address and data pins, and their use in digital (including microprocessor) systems
  • Understand the use of tri-state outputs and busses.
  • Understand and be able to design address decoders, including partial address decoders for simple systems.
  • Be familiar with the system architecture of a typical PIC microprocessor system, including the ALU, memory, I/O;understand how it can be used in practical applications.
  • Be familiar with the internal architecture of a typical PIC microprocessor (the PIC12F629/675) and its instruction set, and understand how instruction execution occurs.
  • Understand the features of typical instruction sets,and be able to use the full instruction set (from the tables in the electrical data book).
  • Be able to write simple programs in assembler mnemonics, including conditional branches, and calculate their execution times in clock cycles; know about the relationship of higher level languages to assembly level code.
  • Understand (in outline only) stacks, subroutines and the hardware reset function.


Digital Fundamentals and Combinational Logic

  • Introduction, revision of simple logic gates, overview of logic circuit families. [1] Ch 3, [3] 392-399, [4] 12
  • Circuits for inverters and basic logic gates in NMOS and CMOS. [3] 409-410, [5] Ch 2,
  • Boolean algebra and its application to combinational logic. Karnaugh maps for function minimisation. [3] 436-446, [4] 39-60, [5] Ch 3,
  • Gate delays, timing diagrams, hazards. [4] 391-398
  • Introduction to VHDL.

Sequential Logic and its Applications

  • Number codes, for example, hexadecimal, BCD, ASCII. 2's complement. [1] Ch 2, [2] Ch 3, [3] 430-435, [4] Ch 10, [6] Ch 3,
  • RS and JK flip-flops, latches and simple counters.[3] 412-419, [5] Ch 4,
  • Synchronous and asynchronous circuits, counters and shift registers. Serial communication. [3] 446-452, [6] Ch 5
  • State diagrams and design methods for a sequencer. [4] Ch 4, [5] Ch 6
  • D to A techniques. Weighted resistor and R-2R ladder networks. Schmitt trigger inputs. [3] 522-523
  • Logic circuits for arithmetic functions.[3] 442, [4] 17

Introduction to Microprocessors

  • Introduction to the architecture of a simple microprocessor. [1] Ch 1,5, [2] 1-9, [4] Ch 1 and Ch 5, [7] 10-13
  • Memory circuits, RAM and ROM. Address decoding, definitions of read/write and chip select signals. [2] Ch 12, [3] 455-460, [4] Ch 6, [6] Ch 2
  • PIC Microprocessor programming. Programme Development, Registers. [1] Ch 7, Ch 8
  • Programming examples based on PIC12F629/675 instruction set. Addressing modes. Implementation using simple machine code. Assembly code and higher level languages. [1] Ch 8,9



Further notes

Associated Experimental Work: A 4-period experiment on PIC microprocessor programming and analogue interfacing. Single period ("short") experiments on (i) combinational logic, and (ii) sequential logic, memory and counting.


Please see the Booklist for Part IA Courses for module references.

Examination Guidelines

Please refer to Form & conduct of the examinations.


The UK Standard for Professional Engineering Competence (UK-SPEC) describes the requirements that have to be met in order to become a Chartered Engineer, and gives examples of ways of doing this.

UK-SPEC is published by the Engineering Council on behalf of the UK engineering profession. The standard has been developed, and is regularly updated, by panels representing professional engineering institutions, employers and engineering educators. Of particular relevance here is the 'Accreditation of Higher Education Programmes' (AHEP) document which sets out the standard for degree accreditation.

The Output Standards Matrices indicate where each of the Output Criteria as specified in the AHEP 3rd edition document is addressed within the Engineering and Manufacturing Engineering Triposes.

Last modified: 31/05/2017 10:00