Dr D Popa and Dr O Akan
Dr O Akan
Timing and Structure
Lent term. 16 lectures.
The aims of the course are to:
- Introduce key aspects of integrated digital electronics and its applications as logic devices.
- Introduce design and optimization techniques for combinational and sequential digital logic circuits.
- Introduce programmable logic design and hardware description language (VHDL) concepts.
- Introduce the principles of design and operation of the major digital integrated circuit technologies.
- Discuss the importance of miniaturising digital circuits and their key role in microprocessors, memories and programmable logic devices.
As specific objectives, by the end of the course students should be able to:
- Understand the technologies that serve as building blocks to modern digital circuits and know their main applications.
- Analyse and synthesise how LSI circuits are used in logic; Multiplexers, Memory blocks, FPGAs.
- Design sequential logic circuits and finite state machines, and know about the Moore and Mealy models.
- Be familiar with VHDL hardware description language and be able to write code for basic circuits.
- Be familiar with the architecture and programming of modern FPGA devices and the design flow involved.
- Design synchronous circuits and use FPGAs for design of sequential networks.
- Appreciate the drive to miniaturise digital circuits and understand how this has improved performance and reduced cost.
- Know the definitions for noise margins, rise times, fall times and transfer characteristics for digital circuits.
- Be aware of the two operating regions (saturation and non-saturation) of the Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) and understand how the equations for the two regions are used to design and estimate the performance of digital circuit
- Appreciate the evolution of MOSFET inverters from the resistive load inverter through the enhancement and depletion transistor load inverters to the CMOS inverter.
- Plot the transfer characteristics and calculate the rise times for NMOS and CMOS inverters.
- Know the basic gate circuits for NMOS and CMOS logic and be able to compare their performance.
- Distinguish between the cut-off, linear and saturation regions of the bipolar transistor and know how the Ebers-Moll equations are used to design and estimate the performance of bipolar transistor digital circuits.
- Explain charge storage in diodes and bipolar transistors and understand how it limits the switching speed of bipolar digital circuits.
- Explain the operation of bipolar/CMOS (BiCMOS) circuits and be aware of their advantages for fast logic gates.
- Explain the operation of Emitter Coupled Logic (ECL) logic circuits and be able to plot the transfer characteristic and calculate the risetime for an ECL inverter.
- Understand the operation of the MOS Schmitt trigger and be able to calculate the trigger voltages.
- Understand the operating principles and design challenges of static and dynamic memories.
Logic Circuits (8L)
Lecture 1. Introduction to logic circuits
Revision of Boolean algebra. NAND, NOR synthesis and logic networks.
Lecture 2. VHDL basics
Introduction to CAD tools. Terminology, Modelling, Synthesis. Design units.
Lecture 3. Combinational circuits
Multiplexers, Decoders, Boolean functions, Lookup Tables.
7-digit display example.
Lecture 4. Sequential circuits
Flip-flops, Registers, Counters.
Finite state machines. Design steps.
Lecture 5. Practical example of a sequential network
Hierarchical design with VHDL.
Lecture 6. Programmable logic circuits
PLDs, CPLDs, FPGAs.
Lecture 7. Data storage, processing and control
Memory blocks, Adders, Multipliers, Accumulators.
A simple processor.
Lecture 8. Digital signal processing
Fast Fourier transform (FFT) demo board application.
Digital Circuits (8L)
Lecture 1. Introduction to digital microelectronics
Lecture 2. Logic gate definitions
Inverter transfer characteristics, noise margins, rise times, fall times, delay times, etc. (H & J, Chap. 1).
Lecture 3. MOS Transistors
(H & J, Chap. 2).
Lecture 4. MOS and CMOS Inverters
(H & J Chap. 3).
Lecture 5. Bipolar Transistors and charge storage
(H & J Chap. 4).
Lecture 6. ECL
(H & J, Chap. 7).
Lecture 7. BiCMOS gates. Schmitt triggers
(H & J, Chapter 8).
Lecture 8. Semiconductor memories: static and dynamic RAM circuits
(H & J, Chapter 9).
Please see the Booklist for Part IIA Courses for references for this module.
Please refer to Form & conduct of the examinations.
Last modified: 31/05/2018 14:47